FPGA - Projekty i Konkursy

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Projekt/Konkurs Opis Oferty/Zgłoszenia Umiejętności Data Publikacji Kończy się Cena (PLN)
DDR3 memory controller interface using nexys video for read write multiple images We are working on nexys video board and we are trying to access DDR3 memory using IPCORE in vivado design suite software. We want to read and write data into DDR3 memory using nexys video board. 3 Programowanie C, Verilog / VHDL, Mikrokontroler, Oprogramowanie wbudowane , FPGA Feb 21, 2018 Dziś6d 6g zł510
Verilog Servo controller I'm looking for someone who can write me a verilog HDL code for a servo controller 7 Programowanie C, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Feb 18, 2018 Feb 18, 20183d 19g zł95
FPGA Based NMR Spectrometer design Need to design a FPGA based NMR Spectrometer for NMR Applications. Phase 1 : Interface high speed ADC and DAC with Altera FPGA and write the software for generating RF pulses and Capture Echo Signal from ADC. See the attached similar work for more details. 10 Elektronika, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Feb 16, 2018 Feb 16, 20181d 11g zł27012
need someone for FPGA work I would like someone to help me build a simple FPGA Kernel for a certain gaming system. I would like your help to improve a FPGA project we are using Altera Quartus programming software i have attached a QAR file First of all, compile it to a POF file and then send it to me and let me examine it and I will give you more instructions on how to proceed. It's not very complicated Let me ask... 9 Programowanie C, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Feb 12, 2018 Feb 12, 2018Zakończone zł523
An expert in FPGA is required I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 4 Programowanie C, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Feb 12, 2018 Feb 12, 2018Zakończone zł508
FPGA QAR Project I have a QAR file that I cannot compile into a POF or PLD file, I would like someone with experience in FPGA to do it. It must be someone with real good knowledge of FPGA. 14 Elektronika, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Feb 12, 2018 Feb 12, 2018Zakończone zł1674
FPGA work .... I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 5 Programowanie C, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Feb 11, 2018 Feb 11, 2018Zakończone zł92
FPGA CONSOLE I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 5 Programowanie C, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Feb 11, 2018 Feb 11, 2018Zakończone zł69
Use edaplayground to run a carry lookahead adder need a 4-bit carry look ahead adder to be coded in system Verilog using edaplayground. 1) write system Verilog model for CLA 2) parameterize for N bits 3) generate/write test bench that works 11 Programowanie C, Verilog / VHDL, Mikrokontroler, Architektura oprogramowania, FPGA Feb 8, 2018 Feb 8, 2018Zakończone zł82
FIR Filter Reference Design in Verilog We are looking for a FIR filter design in Verilog with the following requirements: - 16-bit input, 16-bit fixed coefficient - 39-bit output - 256 taps Please provide 2 implementations: 1. serial implementation using 1 multiplier 2. partial parallel implementation with 4 multiplers 5 Verilog / VHDL, FPGA Feb 4, 2018 Feb 4, 2018Zakończone zł749
Communication PCB for the Super Nintendo cartdrige slot I am looking for a freelancer with knowledge of assembly, microcontrollers, and pcb design. The project is about creating a communication pcb for an older video game console, the Super Nintendo / Super Nes. Let's have a really basic overview of the game system : The software game code is stored within a cartdrige. When the device is powered, the game's ROM placed on the cartdrige is ... 17 Elektronika, Projektowanie obwodów drukowanych (PCB) , Asembler, FPGA Feb 2, 2018 Feb 2, 2018Zakończone zł7342
Petalinux on ZC706 I am looking for someone who has done work on Petalinux on ZC706 or Zedboard. The person MUST have done projects of Ethernet, PS Ram usage, external permanent memory storage using PCIe based drive, SPI control. I need to develop a project using above features. 1 Verilog / VHDL, FPGA Jan 29, 2018 Jan 29, 2018Zakończone zł564
Project for Constantin R. Hi Constantin R., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 3 Mikrokontroler, Projektowanie obwodów drukowanych (PCB) , , Arduino, Projektowanie obwodów elektrycznych, FPGA Jan 12, 2018 Jan 12, 2018Zakończone zł20848
need a VHDL expert asap vhdl expert needed asap to run a code 16 Inżynieria, Elektronika, Verilog / VHDL, Inżynieria elektryczna , FPGA Jan 10, 2018 Jan 10, 2018Zakończone zł67
License Plate Detection Using VHDL I'm building a license plate detection system, and concept has been proven using MATLAB. The current challenge is to implement the design on an Altera DE Board FPGA using VHDL. At this point, because of time constraints I like to ask for ur assistance in the following areas I seek someone who could help Implement the design on an FPGA. Attached is the matlab code 8 Elektronika, Matlab i Mathematica, Verilog / VHDL, Inżynieria elektryczna , FPGA Jan 9, 2018 Jan 9, 2018Zakończone zł1942
SFP communication with FPGA Coding required for FPGA to SFP communication 13 Elektronika, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Jan 6, 2018 Jan 6, 2018Zakończone zł3050
VHDL for programming FPGA board Hi, I run a small sales business in the video game industry. I am looking for someone with VHDL experience to assign pins on an FPGA board for an old video game system, to a new pre-designed break out board to allow the system to use HDMI. Please contact for details. 18 Verilog / VHDL, FPGA Jan 2, 2018 Jan 2, 2018Zakończone zł432
Work with Digital Electronic and Analogue Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 13 Elektronika, Matlab i Mathematica, Verilog / VHDL, Inżynieria elektryczna , FPGA Dec 28, 2017 Dec 28, 2017Zakończone zł112
Need an expert in ASIC board - 1 Hello, everyone! I need you to design ASIC board for mining BTC. If you are an expert in this field, please bid this project. We can discuss more details over chat. Thanks in advance. 8 Elektronika, Wytwarzanie, Mikrokontroler, Inżynieria elektryczna , FPGA Dec 24, 2017 Dec 24, 2017Zakończone zł16482
Convert some VHDL to Verilog Contact me for more details. All I need done is porting some VHDL to Verilog. 18 Inżynieria, Verilog / VHDL, Mikrokontroler, Architektura oprogramowania, FPGA Dec 23, 2017 Dec 23, 2017Zakończone zł401
Need an expert in ASIC board Hello, everyone! I need you to design ASIC board for mining BTC. If you are an expert in this field, please bid this project. We can discuss more details over chat. Thanks in advance. 4 Elektronika, Wytwarzanie, Mikrokontroler, Inżynieria elektryczna , FPGA Dec 23, 2017 Dec 23, 2017Zakończone zł13411
vhdl code using altera Design a digital system that will generate police or unbalance siren sound 9 Inżynieria, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Dec 22, 2017 Dec 22, 2017Zakończone zł445
FPGA Project (VHDL floating and real number mathematical operations using Simulink MATLAB) I need a vhdl program allowing FPGA to do aritmetic calculations with real values. For instance summing, substracting, dividing and multiplying 2 real number values as follows: (2.32 + 3.65; 2.32 - 3.65; 2.32/3.65 ; 2.32*3.65) I assume it suppose to be done using some toolbox on MATLAB ( System Generator Toolbox) This code should work on Xilinx Spartan 6. I want the code written simp... 10 Matlab i Mathematica, Verilog / VHDL, Inżynieria elektryczna , LabVIEW, FPGA Dec 21, 2017 DziśZakończone zł221
Microcontroller design Design and implementation of controller with VHDL in FPGA 13 Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Dec 19, 2017 Dec 19, 2017Zakończone zł483
Generate GPS signal using verilog In my project , I have to generate gps signal using verilog code. For this I need C/A code, random data, carrier signal. So first I have to do bpsk to random data and c/a code then do bpsk with carrier signal . I have given you c/a code you have generate random data , carrier signal and give me output code as well as pictures within 1 or 2 days. 1 Verilog / VHDL, Inżynieria elektryczna , FPGA Dec 19, 2017 Dec 19, 2017Zakończone zł120
Multi-Core ASIC Design - SHA256 Looking for competent person to aide in design of algorithm & ASIC design for cryptocurrency. 8 FPGA Dec 18, 2017 Dec 18, 2017Zakończone zł857
help me with modify some Verilog code know Verilog code, how how to use Quartus and FPGA board. 16 Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , LabVIEW, FPGA Dec 15, 2017 Dec 15, 2017Zakończone zł82
Create an ASIC board capable of hasing SHA256 (2-20Th/s) Good Day I am interested in finding somebody who will be able to design an ASIC board for my team and I. It needs to be able to hash SHA256 in order to mine bitcoin. It is up to you to decide whether you will be using FPGAs or other off-the-shelf ICCs. You will be working with some of the greatest experts in manufacturing and bussiness. It must meet or surpass the following specifications: ... 5 Elektronika, Mikrokontroler, Inżynieria elektryczna , Projektowanie obwodów elektrycznych, FPGA Dec 14, 2017 Dec 14, 2017Zakończone zł1232173
Simulink to VHDL I have done a controller for a battery energy storage system using Matlab Simulink. I need to generate VHDL codes for my controller. If you have NOT done that, please do not wast my time. 5 Elektronika, Matlab i Mathematica, Verilog / VHDL, Inżynieria elektryczna , FPGA Dec 11, 2017 Dec 11, 2017Zakończone zł78
simulation/ VHDL Expert Needed -- Urgent job -- b I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 7 Inżynieria, Elektronika, Verilog / VHDL, Inżynieria elektryczna , FPGA Dec 9, 2017 Dec 9, 2017Zakończone zł187
simulation/ VHDL Expert Needed -- Urgent job I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 0 Inżynieria, Elektronika, Verilog / VHDL, Inżynieria elektryczna , FPGA Dec 9, 2017 Dec 9, 2017Zakończone -
DDR SD ram controller DESIGN AND TEST OF A DDR SDRAM INTERFACE FOR FPGA SYSTEMS Integrate and generate the IP core of DDR, then configure that IP Core, with DCM, PLL, FIFO, and some memory interface with State machine, possible to show the output of writing and reading the data,. with report of Area, power and delay,. Simulation in any standard simulator , Xilinx/Actel/libero 11 Elektronika, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Dec 8, 2017 Dec 8, 2017Zakończone zł1520
FPGA Implementation of FIR filter 1. FIR design and simultion in Matlab. 2. Implement in FPGA(Xilinx Virtex-6 LX240T) and inter-connect with other logic blocks. 3. define registers for FIR filter and gain setting such that user can download filter co-efficients and gain settings through software to FPGA. 24 Matlab i Mathematica, Verilog / VHDL, Inżynieria elektryczna , FPGA Dec 7, 2017 Dec 7, 2017Zakończone zł2672
Design of MIPS Datapath components Using Logisim Course: Computer Organization and Architecture Project: Design of MIPS Datapath components Using Logisim Objectives After completing this project you will: · Design a 32x 32 bit register file · Design a 32 bit arithmetic and logic unit (ALU) Register File The register file consists of 32 x 32-bit registers and has the following interface as shown in Figure 1: _ BusA and BusB... 10 Inżynieria, Elektronika, Verilog / VHDL, Projektowanie obwodów elektrycznych, FPGA Dec 2, 2017 Dec 2, 2017Zakończone zł153
design and implementation of a MIPS CPU with Multi cycle Data path design and implementation of a MIPS CPU with Multi cycle Data path using the VHDL language 14 Programowanie C, Verilog / VHDL, Programowanie w C++, Asembler, FPGA Nov 30, 2017 Nov 30, 2017Zakończone zł534
bubble level project the project must be developed in verilog to be executed on the Nexys4DDR ™ FPGA Board. In the video attached in the .zip, the operation of the project 8 Verilog / VHDL, FPGA Nov 29, 2017 Nov 29, 2017Zakończone zł282
VHDL code for Pipe lined MIPS-RISC (5 stage) processor.(Code for Un-pipelined will be given) I need you to do pipelining for the MIPS-RISC (5 stage) Processor. I will give you the MIPS processor code, all you need to do is pipelining. I will upload the file once go through it. If you are interested, I will send you the code and question for which code has written.” Deadline is " Dec-03-2017 " 12 Programowanie C, Inżynieria, Verilog / VHDL, FPGA, Przetwarzanie Równoległe Nov 29, 2017 Nov 29, 2017Zakończone zł585
embedded s Project: The project consists of multiple phases. It is to develop a logic analyzer and waveform viewer (LA/WV) that can send data to a PC for display. The data collection is done on the FPGA board. A microprocessor gets data from the FPGA board and sends data to the PC through either a Bluetooth modem or a USB port. The system supports one analog channel and one digital channel, with a single... 2 FPGA Nov 28, 2017 Nov 28, 2017Zakończone zł245
Network traffic processing using two FPGAs I want to get throughput and latency results of network traffic(Ethernet packets processing) using two FPGAs, while i have throughput and latency results of using one FPGA, so i want to compare both these results. The results of using two FPGA chips should be better than using one FPGA. 6 Inżynieria, Verilog / VHDL, Inżynieria elektryczna , Administracja sieci, FPGA Nov 26, 2017 Nov 26, 2017Zakończone zł2295
SOC integration problem About timing violation at cross clock domain 1 FPGA Nov 26, 2017 Nov 26, 2017Zakończone zł85
System verilog - open to bidding I need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. Thanks 10 Programowanie C, Verilog / VHDL, Programowanie w C#, Programowanie w C++, FPGA Nov 23, 2017 Nov 23, 2017Zakończone zł36
single cycle 32bit mips verilog code -- 2 i need verilog code for 32bit mips single cycle it must contain instructions LW, SW, AND, ADD, ADDI, SUB, SLT, SLTI,b,BEQ, BNE, J, JAL and JR. and write a test-bench and stimulate and get the output waveform synthesis the code and submit to me 10 Programowanie C, Verilog / VHDL, Programowanie w C++, Asembler, FPGA Nov 23, 2017 Nov 23, 2017Zakończone zł34
System Verliog task available I need someone who can do task on system verilog. Deadline is 2 days. I want someone who can start now. More details will be provided to interested freelancer 8 Inżynieria, Matlab i Mathematica, Verilog / VHDL, Inżynieria elektryczna , FPGA Nov 22, 2017 Nov 22, 2017Zakończone zł80
Computer Design and ProtoTyping build a 32 bit architecture CPU, the CPU include the Register File, ALU, Control Unit, Instruction Register, Data Memory, PC Register, Shift logic unit, Conditional Logic Unit, and a 3-level cache read and write memory for the Data memory. The units need to be built in Verilog HDL then represented as a symbol on a schematic diagram and connected together using wires. Accompanied with each unit s... 8 Elektronika, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Nov 22, 2017 Nov 22, 2017Zakończone zł602
VHDL coding needed to be done by expert!! VHDL coding needed to be done by expert!! $30 CAD pay 8 Inżynieria, Elektronika, Verilog / VHDL, Inżynieria elektryczna , FPGA Nov 22, 2017 Nov 22, 2017Zakończone zł75
LabWindows/CVI Project Simple Update.(send emails when yields goes down) - open to bidding I need a little update in my Test Program (Labwindows). All code and GUI and all is done, just need program be capable to send email automatically to specified people when yields goes down <97%. 4 Programowanie C, Inżynieria, Programowanie w C#, Oprogramowanie wbudowane , FPGA Nov 21, 2017 DziśZakończone zł568
UVM verification of memory controller - open to bidding Need someone to verify a memory controller using UVM environment. CAN bus is used as a memory cycle initiator and write/read burst transactions need to be verified. 5 Perl, Verilog / VHDL, Shell Script , FPGA, Very-large-scale integration (VLSI) Nov 21, 2017 DziśZakończone zł1275
SMC Interface and SPI Slave Logic for CPLD Project 1) Implement high-speed 8-bit bus for MCU (ATSAM3U) to connect to Altera CPLD (5M160ZM68C5N) 2) Implement SPI Mode-0 SPI Slave in CPLD logic 3) Implement Dual SPI Slave mode in CPLD logic 4) Implement QUAD SPI Slave mode in CPLD logic 5) Implement general purpose I/O (8-bit) Port B in CPLD logic 6) Implement JTAG Host shift logic in CPLD logic 7 Programowanie C, Elektronika, Verilog / VHDL, Mikrokontroler, FPGA Nov 21, 2017 DziśZakończone zł95
Video transmission system and USB emulator Project for huge experienced engineers. Result: Altium project and firmware. Details of the project in the attachment. 4 Elektronika, Verilog / VHDL, Projektowanie obwodów drukowanych (PCB) , FPGA Nov 20, 2017 Nov 20, 2017Zakończone zł4791
FPGA and DSP develper Looking for a developer to learn and implement a real time hardware implementation of spectrum analyzer upto 100mhz bandwidth using FPGA, fast ADCs and DACs. 16 Elektronika, Verilog / VHDL, Mikrokontroler, Inżynieria elektryczna , FPGA Nov 17, 2017 Nov 17, 2017Zakończone zł190
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