Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Zatrudnij użytkownika Verilog / VHDL Designers

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    12 znalezione projekty, cennik w USD

    this is fairly a simple project let make now if you ca do it i will attach files read that the budget is also good $200 and i need it asap

    $114 (Avg Bid)
    $114 Średnia Oferta:
    6 składanie ofert

    this is fairly a simple project let make now if you ca do it i will attach files read that the budget is also good $200 and i need it asap

    $142 (Avg Bid)
    $142 Średnia Oferta:
    5 składanie ofert

    Objective is to develop one VLSI Architecture and Verilog code for Algorithm-1(2D-SRNCP) [1] with Derivative variance correlation map for given two 256*256 synthesized & one SAR real time image. Implementation should be done in Matlab@Simulink and Xilinx@ System Generator environment. Implement above algorithm on FPGA Board & GPU. Simulation results should be demonstrated on MATLAB by comp...

    $140 (Avg Bid)
    $140 Średnia Oferta:
    1 składanie ofert
    MRAS SYSTEM SIMULATION USING SIMULINK 3 days left
    ZWERYFIKOWANY

    MRAS SYSTEM SIMULATION USING SIMULINK NEEDED You will have 7 days to complete the work defined in scope. Your bid will not be negotiated so please read well before you bid. Payment will be 50/50 after simulation and after writting. Maximum Budget is 250USD

    $380 (Avg Bid)
    $380 Średnia Oferta:
    7 składanie ofert

    VHDL implemented in altera de2 board

    $430 (Avg Bid)
    $430 Średnia Oferta:
    4 składanie ofert

    Our group wants to implement a game using altera de2 cyclone ii board. Please see the attached file for the details of the game to be implemented.

    $17 (Avg Bid)
    $17 Średnia Oferta:
    2 składanie ofert

    A very simple processor is designed, need to write vhdl codes(few components already written) for it and implement the microprogrammed Control unit.

    $26 (Avg Bid)
    $26 Średnia Oferta:
    5 składanie ofert

    The project has a few basic functions. 1. maintain a specific temperature 2. fire a signal to a solenoid valve in particular (adjustable) intervals. other basic functions like on off etc

    $186 (Avg Bid)
    $186 Średnia Oferta:
    40 składanie ofert

    Verilog simulation of two action-reaction processes

    $29 (Avg Bid)
    $29 Średnia Oferta:
    6 składanie ofert

    Design adc data decoding module. (vivado 2018.2) Input: FCLK,DCLK,DATA_0~DATA_15.(all input signals are LVDS) Output: CLKOUT, DOUT_0 [15:0] ~ DOUT_31 [15:0]. One data path contains two adc signals. The two adc signals are distinguished by FCLK level. I need to decode the adc data into 16-bit wide data and output a total of 32 channels of adc data. The input waveform is shown in the figure. The dif...

    $214 (Avg Bid)
    $214 Średnia Oferta:
    7 składanie ofert

    Vhdl is needed

    $27 (Avg Bid)
    $27 Średnia Oferta:
    6 składanie ofert