Behavior Design of a Programmable Delay Timer

$30-250 USD

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Opublikowano

około 9 lat temu

$30-250 USD

Płatne przy odbiorze

develop a Verilog program that has the identical behavior as programmable digital delay timer LS7212, [login to view URL] , and a testbench program to simulate and verify its operations.

Verilog / VHDL

Identyfikator projektu: 7251888

Informację o projekcie

4 ofert

Zdalny projekt

Aktywny 9 lat temu

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Przyznano:

@loi09dt1

I'm an Verilog expert who can help you perfectly dealing with this project. Contact me and we will disucss more. I have had more than 4 years experiences on FPGA Design using Verilog and VHDL, Circuit design Multisim, Protues, PCB layout, MIPS Assembly, LogiSim, Simulink: - FPGA's Xilinx and Altera. - MicroBlaze, Embedded system design on FPGA of Xilinx. - FPGA, VLSI Implementation of DSP System( Matlab or C, C++, algorithm). - Digital logic design. - Some previous projects: + Matlab and FPGA Implementation of a License Plate Recognition System on FPGA Spartan-6 of Xilinx. + FPGA Implementation of a Fall Detection System on Virtex-5 Xilinx FPGA. + FPGA Implementation of a Fingerprint Identification System on Virtex-5 Xilinx FPGA. + VLSI Implementation of image/video compression in wavelet domain using DWT and SPIHT algorithm + Penalty football game on VGA DE2-70, DE2 Altera + AES 128, 256, 192. + MIPS Single-cycle, Pipeline processor.

$150 USD w 1 dzień

4,6

(31 opinii)

5,2

4 freelancerzy składają oferty o średniej wysokości $169 USD dla tej pracy

@uetian09ee506

I am an Electrical Engineer having specialization in Electronics and Control, working as Lab Engineer at FAST National University Pakistan, in Electrical Department,I have conducted the followings Labs, and also supervised Projects related to these labs. 1. Control System Design & Modelling (Matlab & Simulink) 2. Digital Logic Design (Verilog, VHDL) 3. Digital System Design (Verilog, VHDL) 4. Computer organization & Assembly Language (8086 processor, 8051 controller) 5. Electric Machines 6. Circuit Analysis and Design etc. I assure you, if you assign your project to me, you surely gonna work with me in future.

$150 USD w 3 dni

4,7

(9 opinii)

3,5

@Elecguru011

HI , I can write code for this in verilog targeting cyclone FPGA , do you require simulation in Modelsim as well ?

$222 USD w 3 dni

0,0

(0 opinii)

0,0

@arcotsrinivas94

I have the experience of modelling digital systems of FPGAs using Verilog and VHDL. I understand you need modelling of LS7211-LS7212. I have understood the operation of the chip and I'm confident of programming a behavioural model . Just to assure you that I can do it, I've modelled ALUs, digital subsytems of Microcontrollers. If I'm given this project, I will first come up with the basic functionality of the delay timer and then proceed to incorporating the modes and then complete the modelling.

$155 USD w 10 dni