AC/DC, DC/DC with VHDL

Dear sir, I have more than 7 years experience in digital design using VHDL please give me more details about the required work

I can help you roght awaY! Please send me a message with your project! Please look at my profile! Have a nice day!

I have had 2 years experiencing on FPGA design using Verilog and VHDL. I'm working with HDL everyday. Also, I have tools and KIT FPGA to implement the code. That's why I'm the ideal freelancer for you. Please contact me to discuss more about our deal.

Hello sir, I am interested in more details about the project. could you contact me with more information? Regards

Hi. I am a professional Electronics Engineer having expertise in AC/DC and DC/DC converters. Contact me and have a discussion about it.

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Please send me details of your work. So that i can guide you better on this work. Looking forward to your positive response. Regards, Ali

Being an experience academic writer and well researcher. I am 100% confident I can do this project perfectly. I have already written PhD and Master's Level Paper for UK and US Students and I can easily work on it. I am familiar with Harvard, APA, MLA, Chicago and Oxford Reference Style I have been writing all sorts of scholastic and professional documents for many years. Please consider my bid for high quality work. Thanks..!!

Hi, I am an experienced electronic engineer and VHDL is my speciality. I know feedback and control theory and did couple of controllers in HDL with hysteresis for stability. I also implemented couple of PID regulators. If you know what you want (if you have some model that works, like matlab or some other simulation) it will be straightforward path. If you don't know than it will require some time... After designing, it might be possible that some fine tuning needed at the setup because somethimes simulation are not ideal. By tuning I mean some coefficients adjusting. Thank, Petar Delic

I have experience in this field i developed many games and implemented research papers during last some year of experience.

I am master in vhdl and verilog. ..let me know the requirements. ..I can adjust the my deal ...try to give chance

i have good experience working with Xilinx and Altera FPGA. ervices Offered VLSI Design Services– Digital Design, DSP, and FPGA Digital ASIC & FPGA design, development services, Embedded SOC design using NIOS II, Analog & Mixed-Signal layout design services, Analog & Mixed-Signal IC’s design services, FPGA Design and Prototyping PCB Design Services Process Technology Expertise: CMOS, BiCMOS, GaAs, SiGe.

I, Keyur Mahant working in One of the leading University of India as Asst. Professor in Electronics and Communication Engg. And Space Technology Center as Project Scientist in which, I am working on “Single Event Upset Characterization of FPGA”. In addition I had a one year experience to work with Physical Research Laboratory (PRL), Ahmadabad. In PRL I was working on Chandrayan-2 payload design where I had developed a DAQ for X- Ray florescence for elemental analysis. I had also made a project for Face Recognizance Using PCA in MATLAB. Please send me the details of your project. Currently I am also processing the data of dosimeter UDOS001 using Sparten-3E FPGA and onboard histogram generation using Sparten-3E FPGA with internal memory and external memory. Please provide me the details of your project.

My qualification is M.Tech. in VLSI and Embedded System. I have completed equalizer and text entry system project using VHDL.

I have good knowledge of electronics and of course VHDL. I can perform this job in 3 days at most. I am new in freelancer but have graduated from University in Electronics.

Hello, I have 4+ years experience in FPGA programming. I am involved in all steps of FPGA design cycle - Architecture, coding, functional simulation, timing simulation, board testing and debugging. I have worked on high speed designs which are running on multiple clocks. Regards, Vijayendra

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I have a good knowledge on electronic and electric, I can do a nice work just give more information about your project.

Hi, Iam asic engineer with three years of exp in RTL Design using verilog and system verilog.i designed DDR2,LPDDR2,GPIO,AHB,APB,AXI,ISO7816