I need VHDL code written for a Nexys2 Board from Digilent, Inc. that focus only on the refresh rate of the VGA Monitor displaying in the color black and White. Each color should be connected to a switch so I can test good and bad refresh rates for each separate color on the monitor.
I will need the syntax written for the UCF file to correctly connect to the Nexys2 board to perform testing of the code.
I will need instructions on how to manually change the refresh rates in the code myself so I can use Xilinx ISE Design Suite 13.1 to generate a bit file that will be loaded to the board with Adept Software.
I need to be able to set good and very bad refresh rates to record for my research for each color.
Dear sir I have more than 7 years experience in digital design using vhdl please check my profile , I have the nexus 2 board and I will do all the design and testing on it, then through Skype I will assist you to dump the design on your board and testing it together online
i have read your requirements ////
Please open chat window to discuss further..................
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Hello!
I can deliver the solution for you in 2 days. I have a Nexys Board and I can send a video about the correct operation operation of the design. I get started to workm on the project as the milestone was created on the freelancer.com.
Regards,
Botond
Open the chat I will send some files... for FREE
But dude sorry that I am sending this code(verilog) and UCF(nexys3), but anyways this might help. This will definitely give some output.
Hi,
I am from University of Moratuwa pursuing Electronic and Telecommunication Engineering BSc (Hons) degree. I had my industrial training in a company which is related to EDA tool market. I have done a project related to Game of Life graphical visualization using Basys2 board from Digilent. Inc where I had experience in VGA manipulation for 8 different colors. That project was done in Verilog. Since I had training in VHDL as well I am confident that I could do this in VHDL too.
The project can be divided into the following tasks as I understood.
Task 1 - Build the HDL code of VGA monitor display as to deliver the manipulation of refresh rate of
each color
Task 2 - Generate the UCF file which interconnects the functions to the switches in Nexys2 board
Task 3 - Provide instructions on how the testing can be carried out and to generate the bit file using ISE which can be loaded into the board using Adept software.
Further details can be communicated in the future correspondences.
Thank you.
I have been working on nexys board to a large extent in my research institute. Also the VGA port available on the nexys board is widely explored. Other than the already available vga port I have also made a home brew version of the VGA port to increase the bit resolution of the analog values being sent on the VGA port. This was connected to the expansion header.
Please contact me for more information on the project. I think I will be able to do the project very easily.
Hello,
I have brief experience on RTL and behavioural programming in VHDL and Verilog.
I mainly work on Xilinx platform using ISE tools.
I have experience also into the video related product design.
I think technically I will be able to work with you on this project.
