Application of clock gating on my ASIC DESIGN

I am looking for a skilled freelancer who can apply clock gating techniques to my ASIC design. The project requirements are as follows:

Intended Application:

- The ASIC design will be used for encryption purposes.

Ideal Skills and Experience:

- Strong knowledge and experience in ASIC design and clock gating techniques.

- Proficiency in working with clock gating tools and methodologies.

- Familiarity with low power design techniques and power optimization.

- Experience in encryption or AES

Inżynieria elektryczna Verilog / VHDL FPGA ASIC FPGA Coding

Numer ID Projektu: #37200479

O projekcie