cardinal processor - open to bidding

I like to see the zero level functional architecture of the processor to commit this bid. I have experience in VLSI Architect for 14 years and embedded system designer for two decades. I have worked as VLS architect for companies as PortalPlayer and nComputing among others. Thanks Adi CTO Fornax Research

Hi, I had done MS in Digital Signal Processing and Digital Desing. Also I had around 8 years of industrial experience in the field of FPGAs and Verilog HDL/VHDL Coding. I had worked on several projects related to Verilog HDL. you can contact me with confidence.

we are a team of engineers having experience in related project so hope u will find our service satisfactory

I've got 30+ years of experience in RTL design & verification. Your project description isn't completely clear, but I've already implemented other micro-controllers from scratch.

A proposal has not yet been provided