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Verilog 4-bit ALU implemented on DE0-CV FPGA board

$30-250 USD

Ukończony
Opublikowano około 5 lat temu

$30-250 USD

Płatne przy odbiorze
Document with full requirements will be shared once discussed with person up for the job. Verilog code in top down design for a 4-bit ALU. A test bench will be needed to test design and needs to be able to program DE0-CV FPGA board to implement the full design.
Identyfikator projektu: 19283288

Informację o projekcie

8 ofert
Zdalny projekt
Aktywny 5 lat temu

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Przyznano:
Awatar Użytkownika
Dear sir I have more than 10 years experience in digital design using verilog also I have the DE0 board please message me so that we can discuss
$111 USD w 1 dzień
4,9 (502 opinii)
8,1
8,1
8 freelancerzy składają oferty o średniej wysokości $103 USD dla tej pracy
Awatar Użytkownika
I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.
$72 USD w 3 dni
4,9 (94 opinii)
6,9
6,9
Awatar Użytkownika
Hey! Please check my reviews and profile to know more about me and my work. It would be great if I could help you out. I’ve the board and setup ready with me and can easily implement/test it quickly!
$88 USD w 1 dzień
4,9 (89 opinii)
6,3
6,3
Awatar Użytkownika
Hello there, This is a default bid made. we'll discuss the price later in the chat after reading your project i can do this for you perfectly.I still have a few questions. please leave a message on my chat so we can discuss this further.. Thanks . .
$155 USD w 3 dni
4,7 (11 opinii)
5,9
5,9
Awatar Użytkownika
I have 10 years of experience in design and verification using Verilog. Please message me. Best regards.
$50 USD w 2 dni
5,0 (8 opinii)
4,2
4,2
Awatar Użytkownika
I have 8 yr experience in design & Verification can work & deliver project on time..can develop design/testbench in verilog/vhdl...
$100 USD w 3 dni
4,6 (15 opinii)
4,2
4,2
Awatar Użytkownika
Hello I am an electronics engineer experienced in VHDL/Verilog languages , i have used both for designing lots of circuits also i have implemented a 16-bit priority encoder on Xilinx (spartan-6) FPGA. I think i can do you job perfectly and deliver it on time. I hope to discuss with you more about the project Thanks in advance
$111 USD w 3 dni
4,8 (1 opinia)
0,3
0,3
Awatar Użytkownika
Hi, I am an Electronics Engineer with Silver Medal, I have done some major projects on FPGA like UART implementation, Traffic light controller and RISC processor implementation. I can design your project professionally. I am charging a bit high because your complete work is a bit lengthy. Just inbox me to share more details. Thank you
$133 USD w 5 dni
0,0 (0 opinii)
0,0
0,0

O kliencie

Flaga UNITED STATES
Gilbert, United States
5,0
4
Zweryfikowana metoda płatności
Członek od kwi 5, 2019

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